Flash translation layers (FTLs) are the core embedded software (also known as firmware) of NAND flash-based solid-state drives (SSDs). FTLs are responsible for relocating flash data, erasing outdated flash data, and calculating flash addresses for every read or write request from the computer.
For the purpose of testing and validating FTLs, FTL developers perform real SSD-based stress tests to discover FTL bugs. For example, referring to FIG. 1, by executing conventional stress-testing software 11, a computer 12 can generate intensive read and write traffic to stress an SSD 13. The FTL 14 run by an embedded CPU 15 of the SSD 13 is considered “probably buggy” if data corruption, abnormal SSD disconnection, or request timeout occurs during tests. This real SSD-based testing methodology has two fundamental drawbacks and limitations.
First, SSDs, especially flash memories in the SSDs, exhibit a quite limited access speed, which poses speed limitations on stress tests. For example, for an NVMe PCIe SSD with a write speed of 0.73 GB/s on average, it takes about 23 minutes for a tester to stress test an FTL with 1 TB mixed writes (1000/0.73/60≈23 min).
Second, investigating a failure occurring during real SSD-based FTL tests is burdensome for FTL developers because it involves complicated factors including host OS (e.g., Windows or Linux) compatibility, mother board compatibility, cable signal quality, flash memory quality, power supply stability, FTL firmware, and non-FTL firmware.